liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction
School of Electronics and Computer Science University of Southampton.
School of Electronics and Computer Science University of Southampton.
School of Electronics and Computer Science University of Southampton.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2005 (English)In: 8th Euromicro Conference on Digital System Design DSD2005,2005, Porto, Portugal: IEEE Computer Society Press , 2005, 34- p.Conference paper, Published paper (Refereed)
Abstract [en]

Recent research has shown that the combination of dynamic voltage scaling (DVS) and adaptive body biasing (ABB) yields high energy reductions in embedded systems. Nevertheless, the implementation of DVS and ABB requires a significant system cost, making it less attractive for many small systems. In this paper we demonstrate that it is possible to reduce this system cost and to achieve comparable energy saving to that obtained using combined DVS and ABB scheme through a co-synthesis methodology which is aware of the tasks' power-composition profile (the ratio of the dynamic power to the leakage power). In particular, the presented methodology performs a power management selection at the architectural level, i.e., it decides upon which processing elements to be equipped with which power management scheme (DVS, ABB, or combined DVS and ABB) - with the aim to achieve high energy savings at a reduced implementation cost. The proposed technique maps, schedules, and voltage scales applications specified as task graphs with timing constraints. Detailed experiments including a real-life benchmark are conducted to demonstrate the effectiveness of the proposed methodology.

Place, publisher, year, edition, pages
Porto, Portugal: IEEE Computer Society Press , 2005. 34- p.
Keyword [en]
low power, leakage, co-synthesis, power management, dynamic energy
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-29358DOI: 10.1109/DSD.2005.62Local ID: 14681ISBN: 0-7695-2433-8 (print)OAI: oai:DiVA.org:liu-29358DiVA: diva2:250170
Conference
8th Euromicro Conference on Digital System Design DSD2005
Available from: 2009-10-09 Created: 2009-10-09 Last updated: 2013-08-16

Open Access in DiVA

No full text

Other links

Publisher's full text

Authority records BETA

Eles, Petru Ion

Search in DiVA

By author/editor
Eles, Petru Ion
By organisation
The Institute of TechnologyESLAB - Embedded Systems Laboratory
Computer Science

Search outside of DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric score

doi
isbn
urn-nbn
Total: 113 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf