Minimal Redundancy, Low Power Bus Coding
2005 (English)In: 23rd NORCHIP Conference,2005, Oulu, Finland: University Oulu , 2005, 277- p.Conference paper (Refereed)
A new approach to low redundancy coding for reducing power dissipation in parallel on-chip, deep sub-micron buses is presented. It is shown that the new approach allows lower power dissipation than previous solutions in the given model, yielding reductions of 24% to 41% compared to uncoded transmission for the considered bus widths. Finally some important open problems are given.
Place, publisher, year, edition, pages
Oulu, Finland: University Oulu , 2005. 277- p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-31639Local ID: 17446OAI: oai:DiVA.org:liu-31639DiVA: diva2:252462