Highly Linear Wideband Low Power Current Mode LNA
2008 (English)In: Proceedings from the ICSES'08 - ICSES 2008 International Conference on Signals and Electronic Systems, IEEE , 2008, 73-76 p.Conference paper (Refereed)
This paper presents design considerations for low power, highly linear currentmode LNAs that can be used for wideband RF front-ends for multistandardapplications. The circuit level simulations of the proposed architecture indicatethat with optimal biasing a high value of IIP3 can be obtained. A comparison ofthree scenarios for optimal bias is presented. Simulation results indicate thatwith the proposed architecture, LNAs may achieve a maximum NF of 3.6 dBwith a 3 dB bandwidth larger than 10 GHz and a best case IIP3 of +17.6 dBmwith 6.3 mW power consumption. The LNAs have a broadband input match of 50Ω. The process is 90nm CMOS and with 1.1V supply the LNAs powerconsumption varies between 6.3 mW and 2.3 mW for the best and the worst caseIIP3, respectively.
Place, publisher, year, edition, pages
IEEE , 2008. 73-76 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-14863DOI: 10.1109/ICSES.2008.4673361ISBN: 978-83-88309-47-2 (print)ISBN: 978-83-88309-52-6 (online)OAI: oai:DiVA.org:liu-14863DiVA: diva2:25374
International Conference on Signals and Electronic Systems (ICSES’08), September 14-17, 2008, Krakow, Poland