Mixed signal design in SOI CMOS technology
2005 (English)In: Proc. Swedish System-on-Chip Conf., SSoCC'05, 2005Conference paper (Other academic)
The purpose of this work is to find good design techniques for the analog/mixed-signal parts of a system-on-chip in silicon-on-insulator (SOI). A 6-bit flash analog-to-digital converter (ADC) has therefore been designed and manufactured in a 130 nm partially depleted SOI CMOS technology. The ADC is designed for a sampling frequency of 1.5 GHz or above. An introduction to the SOI technology is also given and some of the major advantages and disadvantages of using SOI are presented.
Place, publisher, year, edition, pages
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-34484Local ID: 21524OAI: oai:DiVA.org:liu-34484DiVA: diva2:255332