Implementation of a combined high-speed interpolation and decimation wave digital filter
1999 (English)In: International conference on electronics, circuits, and systems,1999, 1999, 2/721- p.Conference paper (Refereed)
In this paper we discuss the design and implementation of a novel class of high-speed wave digital filter structures for interpolation and decimation. Four different structures were compared with respect to chip area, power consumption and speed. The best of these structures was combined into an interpolation and decimation filter and has been implemented using redundant arithmetic and standard cells.
Place, publisher, year, edition, pages
1999. 2/721- p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-34491Local ID: 21552OAI: oai:DiVA.org:liu-34491DiVA: diva2:255339