Low power architectures for sine and cosine computation using a sum of bit-products
2005 (English)In: IEEE NorChip Conf.,2005, Oulu: IEEE , 2005, 161- p.Conference paper (Refereed)
Recently, a novel
technique to compute sine and cosine has been proposed. By
rewriting the expressions using trigonometric equations a weighted
sum of bit-products are used to compute the values. This can then
be mapped onto a bit-product generator followed by an adder tree.
This provides an efficient architecture that can be pipelined to an
arbitrary degree. It was shown in previous work that it is possible
to remove a large portion of the bit-products and still obtain
accurate results. The effects of this removal and also the finite
worldlength representation of the weights has also been discussed
in previous work. The objective of this work is to study different
ways to split the architecture into sub-blocks that may be disabled
to decrease the power consumption.
Place, publisher, year, edition, pages
Oulu: IEEE , 2005. 161- p.
National CategoryEngineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-34586Local ID: 22189OAI: oai:DiVA.org:liu-34586DiVA: diva2:255434