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Implementation of low-complexity FIR filters using serial arithmetic
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.ORCID iD: 0000-0003-3470-3911
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
2005 (English)In: IEEE Int. Symp. Circuits Syst.,2005, Piscataway, NJ: IEEE , 2005, II/1449- p.Conference paper, Published paper (Refereed)
Abstract [en]

The effects of digit-size on FIR filters implemented using multiplier block techniques are studied. Two different multiplier block algorithms are considered, one that minimizes the number of adders without considering the number of shifts and one that minimizes the number of shifts while keeping the number of adders low. Results on area, sample rate, and power consumption are presented, focusing on the arithmetic parts of the FIR filter.

Place, publisher, year, edition, pages
Piscataway, NJ: IEEE , 2005. II/1449- p.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-34589Local ID: 22192OAI: oai:DiVA.org:liu-34589DiVA: diva2:255437
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2015-03-11

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http://ieeexplore.ieee.org/iel5/9898/31469/01464871.pdf

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Johansson, KennyGustafsson, OscarWanhammar, Lars

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