Downconversion sampling mixer for wideband low-IF receiver
2003 (English)In: Proceedings of the 10th International Conference on Mixed Design of Integrated Curcuits and Systems (MIXDES), Lodz, Poland: Dpt of Microelectronics and Computer Science, Technical University of Lodz , 2003, 208-213 p.Conference paper (Refereed)
In this paper we discuss applicability of a sampling mixer in a wideband low-IF receiver architecture. It is aimed at a highly digitized structure where the wideband AD conversion is performed at low-IF, and the channel selection and demodulation are left for DSP. While aliasing in downconversion is avoided with a proper choice of the subsampling rate, to cope with the close image problem the IQ scheme must be used as well. An extra constraint is imposed on the subsampling frequency in this way. Noise and linearity properties of the sampling mixer are discussed in a context of the front-end performance, and next, with respect to selected RF standard specifications. The discussion is based on the experience gained with a sampling mixer chip designed and manufactured in CMOS 0.35 µm process. The analysis performed qualifies sampling mixers to be of use in standard RF applications especially when low nonlinear distortions and wide dynamic range are required.
Place, publisher, year, edition, pages
Lodz, Poland: Dpt of Microelectronics and Computer Science, Technical University of Lodz , 2003. 208-213 p.
Downconversion Mixer, Subsampling, Wideband Low-IF Receiver, RF-CMOS design
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-34777Local ID: 23199OAI: oai:DiVA.org:liu-34777DiVA: diva2:255625
10th International Conference Mixed Design of Integrated Circuits and Systems Łódź, Poland, 26-28 June 2003