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Leakage-tolerant circuit and method for large register files
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
Intel Corp., USA.
Intel Corp., USA.
Intel Corp., USA.
2002 (English)Patent (Other (popular science, discussion, etc.))
Abstract [en]

A novel circuit technique for reducing leakage currents through the read-path of large register files in which a negative gate-source voltage is forced on a critical pass transistor between a cell read transistor and a local bitline such that when the cell is in a first state, the leakage current from a dynamic node of the cell read transistor is reduced. The reduced leakage current increases the robustness and performance of the read operation.

Place, publisher, year, edition, pages
2002.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-34891Local ID: 23796OAI: oai:DiVA.org:liu-34891DiVA: diva2:255739
Patent
US US 6388940 B1 (2002-05-14)
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2017-01-19Bibliographically approved

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Alvandpour, Atila

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CiteExportLink to record
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