Optimum voltage swing on on-chip and off-chip interconnect
2001 (English)In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, Vol. 36, no 7, 1108-1112 p.Article in journal (Refereed) Published
Reduced voltage swings are often used for saving power on interconnects. In this paper, we demonstrate the existence of an optimum voltage swing for minimum power consumption, for on-chip and off-chip interconnect. Actual values of optimum swings and corresponding power savings for high performance interconnects are estimated.
Place, publisher, year, edition, pages
2001. Vol. 36, no 7, 1108-1112 p.
National CategoryEngineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-34957DOI: 10.1109/4.933468Local ID: 24289OAI: oai:DiVA.org:liu-34957DiVA: diva2:255805