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A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
Chalmers.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
2001 (English)In: IEEE International Symposium on Circuits and Systems ISCAS.,2001, Piscataway: IEEE , 2001, Vol. 4, 84-87 p.Conference paper, Published paper (Refereed)
Abstract [en]

A fast and area-efficient 32-b Manchester carry-bypass adder with low energy-delay product is presented in this paper. The high speed is achieved by the use of optimized bypass circuitry and fast repeater elements in the carry path. The fabricated adder has a measured worst-case delay of 2.8 ns and consumes 30 μW/MHz

Place, publisher, year, edition, pages
Piscataway: IEEE , 2001. Vol. 4, 84-87 p.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-34964DOI: 10.1109/ISCAS.2001.922175Local ID: 24311ISBN: 0-7803-6685-9 (print)OAI: oai:DiVA.org:liu-34964DiVA: diva2:255812
Conference
2001 IEEE International Symposium on Circuits and Systems, 6-9 May 2001, Sydney, NSW, Australia
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2015-04-09

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Eriksson, HenrikAlvandpour, Atila

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