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Pin assignment for low simultaneous switching noise
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
2005 (English)In: Proc. Swedish System-on-Chip Conf., SSoCC'05, 2005Conference paper, Published paper (Other academic)
Abstract [en]

Simultaneous switching noise (SSN) can degrade the performance of digital circuits. In mixed-signal circuits, the performance of analog circuits are degraded by the SSN that is spread from digital circuits through the substrate to the analog circuits. The most critical parameter when considering SSN is the parasitic inductance in the power supply path from off-chip to on-chip. In this paper, basic theories of inductance of current paths are given for parallel interconnects throughout examples. The results from these examples show that the placement of interconnects plays a big role for the effective inductance. Power supply interconnects should be placed with small distances in between, and so that currents in adjacent interconnects are in opposite directions. With this strategy, a low inductance in the power supply current path can be achieved. The importance of choosing a good package for the silicon die is also briefly discussed.

Place, publisher, year, edition, pages
2005.
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Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-37156Local ID: 33811OAI: oai:DiVA.org:liu-37156DiVA: diva2:258005
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2009-10-14

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Backenius, ErikVesterbacka, Mark

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