Protocol requirements in an SJTAG/IJTAG environment
2007 (English)In: IEEE International Test Conference, 2007, IEEE , 2007, 942-950 p.Conference paper (Refereed)
Integrated Circuits, Printed Circuits Boards, and Multi-board systems are becoming increasingly complex to test. A major obstacle is test access, which would be eased by effective standards for the communication between devices-under-test (DUTs) and the test manager. Currently, the Internal Joint Test Access Group (IJTAG) work at micro-level on a standard for interfacing embedded on-chip instruments while the System JTAG (SJTAG) work at macro-level on a standard for system-level test management that connects IJTAG compatible instruments with the system test manager. In this paper we discuss requirements on a test protocol to be used in an SJTAG/IJTAG environment. We have from a number of use scenarios made an analysis and defined protocol requirements. We have taken the Standard Test and Programming Language (STAPL), which is built around a player (interpreter), and defined required extensions. The extensions have been implemented in an extended version of STAPL and we have made experiments with a PC acting as test controller and an FPGA being the DUT.
Place, publisher, year, edition, pages
IEEE , 2007. 942-950 p.
, International Test Conference. Proceedings, ISSN 1089-3539
testing, Integrated Circuits, Printed Circuits Boards, Multi-board systems, test protocol
National CategoryComputer Science
IdentifiersURN: urn:nbn:se:liu:diva-39296DOI: 10.1109/TEST.2007.4437658ISI: 000255939900103Local ID: 47829ISBN: 978-1-4244-1127-6ISBN: e-978-1-4244-1128-3OAI: oai:DiVA.org:liu-39296DiVA: diva2:260145
IEEE International Test Conference (ITC 2007), 21-26 October 2007, Santa Clara, California, USA