Energy-Aware Synthesis of Fault-Tolerant Schedules for Real-Time Distributed Embedded Systems
2007 (English)In: 19th Euromicro Conference on Real-Time Systems ECRTS, Work-In-Progress Section,2007, Pisa, Italy: IEEE Computer Society Press , 2007, 21- p.Conference paper (Refereed)
This paper presents a design optimisation tool for distributed embedded real-time systems that 1) decides mapping, fault-tolerance policy and generates a fault-tolerant schedule, 2) is targeted for hard real-time, 3) has hard reliability goal, 4) generates static schedule for processes and messages, 5) provides fault-tolerance for k transient/soft faults, 6) optimises for minimal energy consumption, while considering impact of lowering voltages on the probability of faults, 7) uses constraint logic programming (CLP) based implementation.
Place, publisher, year, edition, pages
Pisa, Italy: IEEE Computer Society Press , 2007. 21- p.
fault tolerance, embedded systems, design optimization, time-triggered systems, static scheduling, hard real-time, constraint logic programming
IdentifiersURN: urn:nbn:se:liu:diva-39307Local ID: 47848OAI: oai:DiVA.org:liu-39307DiVA: diva2:260156