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Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory. Linköping University, The Institute of Technology.
NXP Semiconductors Research, The Netherlands.
NXP Semiconductors Research, The Netherlands.
NXP Semiconductors Research, The Netherlands.
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2007 (English)In: Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07, Nice, France: IEEE , 2007, 859-864 p.Conference paper (Refereed)
Abstract [en]

Embedded First-In First-Out (FIFO) memories are increasingly used in many IC designs. We have created a new full-custom embedded FIFO module with asynchronous read and write clocks, which is at least a factor two smaller and also faster than SRAM-based and standard-cell-based counterparts. The detection qualities of the FIFO test for both hard and weak resistive shorts and opens have been analyzed by an IFA-like method based on analog simulation. The defect coverage of the initial FIFO test for shorts in the bit-cell matrix has been improved by inclusion of an additional data background and low-voltage testing; for low-resistant shorts, 100% defect coverage is obtained. The defect coverage for opens has been improved by a new test procedure which includes waiting periods.

Place, publisher, year, edition, pages
Nice, France: IEEE , 2007. 859-864 p.
, Design, Automation, and Test in Europe Conference and Exhibition. Proceedings, ISSN 1530-1591
Keyword [en]
embedded systems, testing, FIFO, memory, test quality analysis
National Category
Computer Science
URN: urn:nbn:se:liu:diva-39308DOI: 10.1109/DATE.2007.364400ISI: 000252175700145Local ID: 47849ISBN: 978-3-9810801-2-4OAI: diva2:260157
Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), 16-20 April 2007, Nice, France
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2012-11-16

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Larsson, Erik
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ESLAB - Embedded Systems LaboratoryThe Institute of Technology
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