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Bulk-synchronous parallel computing on the CELL processor
NSC Linköpings universitet.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, PELAB - Programming Environment Laboratory.ORCID iD: 0000-0001-5241-0026
2007 (English)In: PARS-2007 21. PARS - Workshop, Hamburg, Germany, May 31-Jun 1, 2007. GI/ITG-Fachgruppe Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware PARS.,2007, GI Gesellschaft für Informatik e.V. , 2007Conference paper, Published paper (Refereed)
Abstract [en]

In order to ease programming of heterogeneous architectures with explicitly managed memory hierarchies such as the CELL processor, we propose a solution adopting the BSP model as implemented in the parallel programming language NestStep. This allows the programmer to write programs with a global address space and run them on the slave processors (SPEs) of CELL while keeping the large data structures in main memory. We have implemented the run-time system of NestStep on CELL and report on performance results that demonstrate the feasibility of the approach. The test programs scale very well as their execution time is mostly dominated by calculations, and only a fraction is spent in the various parts of the NestStep runtime system library. The library also has a relatively small memory footprint in the SPE's software managed local memory.

Place, publisher, year, edition, pages
GI Gesellschaft für Informatik e.V. , 2007.
Keyword [en]
multicore processor architecture, parallel programming, bulk-synchronous parallelism
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-40732Local ID: 54009OAI: oai:DiVA.org:liu-40732DiVA: diva2:261581
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2014-10-08

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Eriksson, MattiasKessler, Christoph

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