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Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Dept. of Computer Science Lund University.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
Dept. of Electrical and Computer Engineering State University of New York at Stony Brook.
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2008 (English)In: Design, Automation, and Test in Europe: The Most Influential Papers of 10 Years DATE, Dordrecht, The Netherlands: Springer , 2008, 1, 15-29 p.Chapter in book (Other academic)
Abstract [en]

We present an approach to process scheduling based on an abstract graph representation which captures both data-flow and the flow of control. Target architectures consist of several processors, ASICs and shared busses. We have developed a heuristic which generates a schedule table so that the worst case delay is minimized. Several experiments demonstrate the efficiency of the approach.

Place, publisher, year, edition, pages
Dordrecht, The Netherlands: Springer , 2008, 1. 15-29 p.
Keyword [en]
embedded systems, scheduling, conditional scheduling, conditional process graph, distributed systems
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-42250Local ID: 62033ISBN: 978-1-4020-6487-6 (print)OAI: oai:DiVA.org:liu-42250DiVA: diva2:263106
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2013-05-24Bibliographically approved

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linkfind book at a swedish library/hitta boken i ett svenskt bibliotek

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Eles, Petru IonPeng, Zebo

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Output format
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