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Flexible power amplifier designing form device to circuit level by computational load-pull simulation technique
Linköping University, The Institute of Technology. Linköping University, Department of Physics, Chemistry and Biology, Semiconductor Materials.
Linköping University, The Institute of Technology. Linköping University, Department of Physics, Chemistry and Biology, Semiconductor Materials.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronic Devices.
Linköping University, The Institute of Technology. Linköping University, Department of Physics, Chemistry and Biology, Semiconductor Materials.
2008 (English)In: Microelectonics Technology and Devices - SBMicro 2008, Vol. 14, issue 1: J. Swart, S. Selberherr, A. Susin, J. Diniz, N. Morimoto, Pennington, New Jersey: Electrochemical Society , 2008, Vol. 14, 233-239 p.Conference paper, Published paper (Refereed)
Abstract [en]

Matchingnetwork is major issue in broadband power amplifiers due tothe fact that the transistor impedances are varying both withfrequency and signal level. Thus it is difficult to matchthese impedances both at the input and output stages. Thetunable matching networks are very demanding and desired for buildingflexible systems, but their accuracy depends on the transistor performanceunder the large signal operation. Computational load pull (CLP) simulationtechnique is a unique way to extract the impedances ofpower transistor at desired frequencies which make the design ofmatching network much easier for multiple bands power amplifiers. AnLDMOS transistor is studied and its optimum impedances are extractedat 1, 2 and 2.5 GHz. Through optimum impedance, thetunable matching networks can be easily design for broadband amplifiers.

Place, publisher, year, edition, pages
Pennington, New Jersey: Electrochemical Society , 2008. Vol. 14, 233-239 p.
Series
ECS Transations, ISSN 1938-5862, E-ISSN 1938-6737
National Category
Natural Sciences
Identifiers
URN: urn:nbn:se:liu:diva-43513DOI: 10.1149/1.2956037Local ID: 74034ISBN: 978-1-56677-646-2 (print)OAI: oai:DiVA.org:liu-43513DiVA: diva2:264372
Conference
23rd Symposium on Microelectronics Technology and Devices, September 1 to 4, Gramado, Brazil
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2017-04-11Bibliographically approved
In thesis
1. Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems
Open this publication in new window or tab >>Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems
2010 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The emergence of new communication standards has put a key challenge for semiconductor industry to develop RF devices that can handle high power and high data rates simultaneously. The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a heart of base-station. From economical point of view, a single wideband RF power module is more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode operation. Therefore, device modeling has now become much more crucial for such applications. In order to reduce the device design cycle time, the researchers also heavily rely on computer aided design (CAD) tools. With improvement in CAD technology the model extraction has become more accurate and device physical structure optimization can be carried out with less number of iterations.

LDMOS devices have been dominating in the communication field since last decade and are still widely used for PA design and development. This thesis deals with the optimization of RFLDMOS transistor and its evaluation in different PA classes, such as linear, switching, wideband and multi-band applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are also developed in technology CAD (TCAD) using large signal time domain computational load-pull (CLP) methods.

Initially the RF-LDMOS is studied in TCAD for the improved RF performance. The physical intrinsic structure of RF-LDMOS is provided by Infenion Technologies AG. A reduced surface field (RESURF) of low-doped drain (LDD) region is considered in detail because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage (BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance (Ron). The excess interface state charges at the RESURF region are introduced to reduce the Ron, which not only increases the dc drain current, but also improve the RF performance in terms of power, gain and efficiency. The important achievement is the enhancement in operating frequency up to 4 GHz. In LDD region, the effect of excess interface charges at the RESURF is also compared with dual implanted-layer of p-type and n-type. The comparison revealed that the former provides 43 % reduction in Ron with BVDS of 70 V, while the later provides 26 % reduction in Ron together with BVDS of 64 - 68 V.

In the second part of my research work, computational load pull (CLP) simulation technique is used in TCAD to extract the impedances of RF-LDMOS at different frequencies under large signal operation. Flexible matching is an issue in the design of broadband or multi-band PAs. Optimum impedance of RF-LDMOS is extracted at operating frequencies of 1, 2 and 2.5 GHz in class AB PA. After this, CLP simulation technique is further developed in TCAD to study the non-linear behavior of RF devices. Through modified CLP technique, non-linear effects inside the transistor structure are studied by conventional two-tone RF signals in time domain. This is helpful to detect and understand the phenomena, which can be resolved to improve the device performance. The third order inter-modulation distortion (IMD3) of RF- LDMOS was observed at different power levels. The IMD3 of −22 dBc is obtained at 1-dB compression point (P1-dB), while at 10 dB back off the value increases to −36 dBc. These results were also verified experimentally by fabricating a linear PA. Similarly, CLP technique is developed further for the analysis of RF devices in high efficiency operation by investigating the odd harmonic effects for the design of class-F PA. RF-LDMOS can provide a power added efficiency (PAE) of 81.2 % in class-F PA at 1 GHz in TCAD simulations. The results are verified by design and fabrication of class-F PA using large signal model of the similar device in ADS. In fabrication, a PAE of 76 % is achieved.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press, 2010. 64 p.
Series
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 1346
Keyword
RF-LDMOS, power amplifiers, technology CAD, load-pull, non-linear analysis, and switching analysis
National Category
Condensed Matter Physics
Identifiers
urn:nbn:se:liu:diva-61599 (URN)978-91-7393-294-3 (ISBN)
Public defence
2010-12-03, Plank, Fysikhuset, Campus Valla, Linköpings universitet, Linköping, 10:15
Opponent
Supervisors
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2010-11-17Bibliographically approved

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Kashif, Ahsan-UllahAzam, SherSvensson, ChristerWahab, Qamar Ul

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