Flexible power amplifier designing form device to circuit level by computational load-pull simulation technique
2008 (English)In: Microelectonics Technology and Devices - SBMicro 2008, Vol. 14, issue 1: J. Swart, S. Selberherr, A. Susin, J. Diniz, N. Morimoto, Pennington, New Jersey: Electrochemical Society , 2008, Vol. 14, 233-239 p.Conference paper (Refereed)
Matching network is major issue in broadband power amplifiers due to the fact that the transistor impedances are varying both with frequency and signal level. Thus it is difficult to match these impedances both at the input and output stages. The tunable matching networks are very demanding and desired for building flexible systems, but their accuracy depends on the transistor performance under the large signal operation. Computational load pull (CLP) simulation technique is a unique way to extract the impedances of power transistor at desired frequencies which make the design of matching network much easier for multiple bands power amplifiers. An LDMOS transistor is studied and its optimum impedances are extracted at 1, 2 and 2.5 GHz. Through optimum impedance, the tunable matching networks can be easily design for broadband amplifiers.
Place, publisher, year, edition, pages
Pennington, New Jersey: Electrochemical Society , 2008. Vol. 14, 233-239 p.
, ECS Transations, ISSN 1938-6737 (online), 1938-5862 (print)
IdentifiersURN: urn:nbn:se:liu:diva-43513DOI: 10.1149/1.2956037Local ID: 74034ISBN: 978-1-56677-646-2OAI: oai:DiVA.org:liu-43513DiVA: diva2:264372
23rd Symposium on Microelectronics Technology and Devices, September 1 to 4, Gramado, Brazil