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On Reduction of Capture Power for Modular System-on-Chip Test
Supercomputer Education and Research Centre SERC Indian Institute of Science, Bangalore, India.
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2008 (English)In: IEEE Workshop on RTL and High Level Testing WRTLT08,2008, 2008Conference paper, Published paper (Refereed)
Abstract [en]

  

Place, publisher, year, edition, pages
2008.
Keyword [en]
modular system-on-chip, testing, power reduction
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-43983Local ID: 75305OAI: oai:DiVA.org:liu-43983DiVA: diva2:264844
Available from: 2009-10-10 Created: 2009-10-10

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Larsson, Erik

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The Institute of TechnologyESLAB - Embedded Systems Laboratory
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CiteExportLink to record
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  • harvard1
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