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Bit-level optimized high-speed architectures for decimation filter applications
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.ORCID iD: 0000-0003-3470-3911
2008 (English)In: IEEE International Symposium on Circuits and Systems,2008, Piscataway, NJ: IEEE , 2008, 1914- p.Conference paper, Published paper (Refereed)
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Piscataway, NJ: IEEE , 2008. 1914- p.
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Engineering and Technology
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URN: urn:nbn:se:liu:diva-44131DOI: 10.1109/ISCAS.2008.4541817Local ID: 75761OAI: oai:DiVA.org:liu-44131DiVA: diva2:264992
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2015-03-11

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Blad, AntonGustafsson, Oscar

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