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Bit-level optimized high-speed architectures for decimation filter applications
Blad, Anton
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
Gustafsson, Oscar
Linköping University, The Institute of Technology. Linköping University, Department of Electrical Engineering, Electronics System.
ORCID iD:
0000-0003-3470-3911
2008 (English)
In:
IEEE International Symposium on Circuits and Systems,2008, Piscataway, NJ: IEEE , 2008, p. 1914-
Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
Piscataway, NJ: IEEE , 2008. p. 1914-
National Category
Engineering and Technology
Identifiers
URN:
urn:nbn:se:liu:diva-44131
DOI:
10.1109/ISCAS.2008.4541817
Local ID: 75761
OAI: oai:DiVA.org:liu-44131
DiVA, id:
diva2:264992
Available from:
2009-10-10
Created:
2009-10-10
Last updated:
2015-03-11
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Blad, Anton
Gustafsson, Oscar
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Gustafsson, Oscar
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modern-language-association-8th-edition
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ieee
modern-language-association-8th-edition
vancouver
oxford
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de-DE
en-GB
en-US
fi-FI
nn-NO
nn-NB
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fi-FI
nn-NO
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