Reply to the comments on originality of the paper, "The integrated scheduling and allocation of high-level test synthesis"
1999 (English)In: IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, ISSN 0916-8508, Vol. E82A, no 12, 2834-2835 p.Other (Other academic)
As many research works are based on some previous results, my paper, namely The Integrated Scheduling and Allocation of High-Level Test Synthesis, makes use of some techniques by T. Kim. However, I did not state explicitly that some parts of my work are based on Kim's approach although I have referred to his paper. I would like to express my deep apology to Kim for not having emphasized Kim's contribution to my work. But my intention was not to steal Kim's ideas. I would like to emphasize the following difference.
Place, publisher, year, edition, pages
1999. Vol. E82A, no 12, 2834-2835 p.
high-level test synthesis, scheduling and allocation, testability analysis, loop analysis, design transformations
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-49931OAI: oai:DiVA.org:liu-49931DiVA: diva2:270827