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Reply to the comments on originality of the paper, "The integrated scheduling and allocation of high-level test synthesis"
Linköping University, The Institute of Technology. Linköping University, Department of Computer and Information Science.
1999 (English)In: IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, ISSN 0916-8508, E-ISSN 1745-1337, Vol. E82A, no 12, 2834-2835 p.2834-2835 p.Article in journal, Editorial material (Other academic) Published
Abstract [en]

As many research works are based on some previous results, my paper, namely The Integrated Scheduling and Allocation of High-Level Test Synthesis, makes use of some techniques by T. Kim. However, I did not state explicitly that some parts of my work are based on Kim's approach although I have referred to his paper. I would like to express my deep apology to Kim for not having emphasized Kim's contribution to my work. But my intention was not to steal Kim's ideas. I would like to emphasize the following difference.

Place, publisher, year, edition, pages
IEICE , 1999. Vol. E82A, no 12, 2834-2835 p.2834-2835 p.
Keyword [en]
high-level test synthesis, scheduling and allocation, testability analysis, loop analysis, design transformations
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-49931OAI: oai:DiVA.org:liu-49931DiVA: diva2:270827
Available from: 2009-10-11 Created: 2009-10-11 Last updated: 2017-12-12Bibliographically approved

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Yang, Tianruo

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