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An asynchronous architecture for modeling intersegmental neural communication
IEEE, Georgia Institute of Technology, Atlanta, GA 30332, United States, Alereon, Austin, TX.
IEEE, Georgia Institute of Technology, Atlanta, GA 30332, United States.
IEEE, Georgia Institute of Technology, Atlanta, GA 30332, United States, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, University of Linkoping, Linkoping, Sweden, NASA's Jet Propulsion Laboratory, IBM Almaden Research Center, Intel, Tau Beta Pi, Eta Kappa Nu.
IEEE, Georgia Institute of Technology, Atlanta, GA 30332, United States, Wallace H. Coulter Department of Biomedical Engineering, School of Electrical and Computer Engineering, Georgia Institute of Technology, Emory University, School of Medicine, Atlanta, GA.
2006 (English)In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems, ISSN 1063-8210, E-ISSN 1557-9999, Vol. 14, no 2, 97-111 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents an asynchronous VLSI architecture for modeling the oscillatory patterns seen in segmented biological systems. The architecture emulates the intersegmental synaptic connectivity observed in these biological systems. The communications network uses address-event representation (AER), a common neuromorphic protocol for data transmission. The asynchronous circuits are synthesized using communicating hardware processes (CHP) procedures. The architecture is scalable, supports multichip communication, and operates independent of the type of silicon neuron (spiking or burst envelopes). A 16-segment prototype system was developed, tested, and implemented, data from this system are presented. © 2006 IEEE.

Place, publisher, year, edition, pages
2006. Vol. 14, no 2, 97-111 p.
Keyword [en]
Address event representation (AER), Asynchronous circuits, Central pattern generator (CPG), Neurobiological modeling, Neuromorphic engineering, Silicon neuron, VLSI architecture
National Category
Natural Sciences
Identifiers
URN: urn:nbn:se:liu:diva-50304DOI: 10.1109/TVLSI.2005.863762OAI: oai:DiVA.org:liu-50304DiVA: diva2:271200
Available from: 2009-10-11 Created: 2009-10-11 Last updated: 2017-12-12

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