Implementation of fast DSP algorithms using bit-serial arithmetic
1994 (English)In: National Conf. on Electronic Design Automation, EDA-meeting'94, 1994Conference paper (Other academic)
In this paper we discuss the design and implementation of fixed-function, recursive DSP algorithms. We demonstrate by means of a wave digital lattice filter that a sampling frequency of more than 130 MHz can be achieved for a recursive algorithm by using bit-serial arithmetic. The proposed approach leads to very fast recursive algorithms with low power consumption and a minimum requirement of chip area. Further, we show that the iteration period bound by Renfors et al. often can be lowered by applying numerical equivalence transformations to the signal-flow graph. The proposed implementation technique can easily be extended to higher-order bireciprocal and non-bireciprocal lattice filters as well as other types of DSP algorithms.
Place, publisher, year, edition, pages
National CategoryOther Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-50879OAI: oai:DiVA.org:liu-50879DiVA: diva2:272292