Serial squarers and serial/serial multipliers
1996 (English)In: Proc. National Conf. on Radio Science and Communication, RVK'96, 1996, 518-522 p.Conference paper (Other academic)
Algorithms for full-precision computation of squares and products are derived. The algorithms yield minimum bit-serial latency. We present logic realizations for the algorithms based on shift accumulators. The realizations have been partitioned into regular bit-slices suitable for hardware implementation.
Place, publisher, year, edition, pages
1996. 518-522 p.
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-50884OAI: oai:DiVA.org:liu-50884DiVA: diva2:272297