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An FFT processor based on the SIC architecture with asynchronous PE
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Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
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1996 (English)In: Proc. IEEE 1996 Midwest Symp. on Circuits and Systems, MWSCAS'96, 1996, III-1313-III-1316 p.Conference paper, Published paper (Refereed)
Abstract [en]

A SIC architecture with asynchronous bit-serial PEs is presented and applied to the Sande-Tukey's FFT. The resulting architecture can easily be modified for higher throughput and/or lower power consumption. Using this architecture a high-performance chip for use in an OFDM transmission system has been designed.

Place, publisher, year, edition, pages
1996. III-1313-III-1316 p.
Keyword [en]
application specific integrated circuits, fading, fast Fourier transforms, frequency division multiplexing, intersymbol interference, mobile radio
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-50910DOI: 10.1109/MWSCAS.1996.593171ISBN: 0-7803-3636-4 (print)OAI: oai:DiVA.org:liu-50910DiVA: diva2:272315
Available from: 2009-10-15 Created: 2009-10-15 Last updated: 2009-10-17

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Palmkvist, KentVesterbacka, MarkWanhammar, Lars

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