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A 14-transistor CMOS full adder with full voltage-swing nodes
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
1999 (English)In: Proc. IEEE Workshop on Signal Processing Systems, SIPS'99, 1999, p. 713-722Conference paper, Published paper (Refereed)
Abstract [en]

We explain how exclusive OR and NOR circuits (XOR/XNOR) are used to realize a general full adder circuit based on pass transistors. A six-transistor CMOS XOR circuit that also produces a complementary XNOR output is introduced in the general full adder. The resulting full adder circuit is realized using only 14 MOSFETs, while having full voltage-swing in all circuit nodes. Layouts have been made in a 0.35 μm process for both the proposed full adder circuit and another 16-transistor full adder circuit based on pass transistors. The performance of the proposed full adder is evaluated by comparison of the simulation results obtained from HSPICE for both layouts. The two adders yield similar performance in terms of power consumption, power delay product, and propagation delay. The area is somewhat lower for the proposed adder due to the reduced device count. However, due to two feedback MOSFETs in the proposed adder that need to be ratioed, there is a higher cost in terms of design effort for the proposed adder

Place, publisher, year, edition, pages
1999. p. 713-722
Keywords [en]
CMOS logic circuits, MOSFET, exclusive OR circuits, adders, delays
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-50914DOI: 10.1109/SIPS.1999.822379ISBN: 0-7803-5650-0 (print)OAI: oai:DiVA.org:liu-50914DiVA, id: diva2:272319
Available from: 2009-10-15 Created: 2009-10-15 Last updated: 2009-10-17

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Vesterbacka, Mark

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Citation style
  • apa
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  • Other style
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  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
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