A CAD tool for synthesis of maximally fast lattice wave digital filters
1999 (English)In: Proc. National Conf. on Radio Science and Communication, RVK'99, 1999, 456-460 p.Conference paper (Other academic)
A synthesis tool has been developed that implements the scheduling and the hardware mapping of maximally fast, bit-serial lattice wave digital filters. Such implementations are of interest for use in high-speed applications or in low-power applications after supply voltage scaling. The tool generates a synthesizable VHDL hardware netlist from a set of coefficients describing the filter. The VHDL netlist is further mapped to an ASIC using tools from Mentor Graphics. Currently the tool is capable of synthesizing two lattice wave digital filter structures as well as optimizing the structure for cases like the bireciprocal form of the filter.
Place, publisher, year, edition, pages
1999. 456-460 p.
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-50917OAI: oai:DiVA.org:liu-50917DiVA: diva2:272322