Dual matrix linear-code D/A converters
2000 (English)In: Proc. 2000 IEEJ Int. Analog VLSI Workshop, IAVLSI'00, 2000, 63-68 p.Conference paper (Refereed)
To design a high-speed flash D/A converter with high resolution we need to keep the glitch noise within acceptable levels. The current practice is to use a segmented converter structure where we can trade off hardware complexity and glitch performance by selecting a proper number of most significant bits to be thermometer coded. For the remaining least significant bits (LSB) binary-scale are used. A recently proposed alternative to this method is to design a converter with linearly increasing weights, i.e., 1 LSB, 2 LSB, 3 LSB,... . In this paper, we propose two new converter structures that both have a dual linear-coded source matrix operating in parallel with the original linear-coded source matrix. Simulations show that we can expect up to 30% better glitch performance for one of the proposed structures, assuming signals with moderate transitions. However, for signals with large transitions there is no significant improvement.
Place, publisher, year, edition, pages
2000. 63-68 p.
digital-analog converter, flash, high-speed, high resolution, glitches, linear coding, encoder
National CategoryOther Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-50920OAI: oai:DiVA.org:liu-50920DiVA: diva2:272325
2000 IEEJ International Analog VLSI Workshop, June 2 - 3, 2000, Stockholm, Sweden