Characteristics of a differential D flip-flop
2003 (English)In: Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003, Vol. 4Conference paper (Other academic)
A D flip-flop circuit that works well with long rise and fall times of the clock is characterized. This property is important when we would like to, e.g., relax the constraints on the clock distribution network or reduce the amount of noise generated in a mixed-signal circuit. Since the use of the D flip-flop allows small clock driver circuits, the amount of simultaneous switching noise can be reduced. There is also a potential for power savings with the use of smaller drivers, assuming that the short-circuit current in the flip-flops can be kept low. Moreover, the high frequency content of the clock is reduced, causing the noise that is injected into the substrate to be more easy to suppress. This is important in a mixed-signal circuit where analog circuits are present on the same substrate. The effects of long rise and fall times on the differential D flip-flop used in this work are mainly longer propagation times.
Place, publisher, year, edition, pages
2003. Vol. 4
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-50930OAI: oai:DiVA.org:liu-50930DiVA: diva2:272334