Today, owing to the rapid advancement of technologies, people can cross the geographic gap and communicate without waiting for a week to receive a mail. Meanwhile, more and more wireless communications standards are emerging, as all claimed to make our life easier. This really brings us into a dilemma: we need new technologies, not because we are fond of technical complication,
on the contrary, because we are constantly pursuing convenience and simplicity. Being tangled by so many standards for connectivity is not fun for anyone (even for people who invented these technologies). The demand is rather simple: why not put everything into one unit which can automatically attach itself to the most suitable radio access available in the circumstances? The whole purpose of this thesis is to find out an economic way of meeting such a demand.
From semiconductor industry’s point-of-view, traditional ASIC design flow is facing the challenges brought by the ever rapidly changing specification and immense tape-out cost at nanoscale. Let alone the ever increased system complexity requires painstaking and costly integration and verification.
This thesis investigates multi-tasking radio which is a concept to allow multiple radio access technologies to be supported by the same hardware platform and switched under different scenarios. By simultaneously looking at different layers of abstraction such as system modeling and simulation, architecture design, and silicon implementation, the design tradeoff for multi-tasking radio baseband is discussed.
In this dissertation, taking the emerging mobile broadband standard 3GPP LTE as the focus and other standards (e.g IEEE 802.11n and DVB) as complements, the system architecture of a multi-tasking radio platform is studied. A general multi-tasking radio baseband chain is partitioned into several functional blocks according to the processing flow and investigated separately. These blocks include synchronization, channel estimation, demodulation and channel coding. Different algorithms are evaluated for each functional block. A new multiple-input multipleoutput symbol detection algorithm “modified fixed-complexity soft-output”, in short MFCSO, is proposed and implemented in silicon. A unified synchronization unit is presented to support several standards. The architecture of channel estimator is also addressed. Finally a highspeed radix-2 Turbo decoder implementation is presented leading towards radix-4 scenario. It is worth mentioning that in this dissertation, the performance evaluation takes the complete system into consideration rather than independently analyzing an individual block. Based on this, algorithm/hardware co-optimization is carried out. Using the “Single Instruction Multiple Tasks” architecture presented earlier, by exploring the commonality of signal processing functions and choosing the proper level of hardware multiplexing, it is concluded in this dissertation that system thinking allows a harmony to be achieved for multi-tasking radio baseband design.
Linköping: Linköping University Electronic Press , 2009. , 168 p.
2009-11-27, Visionen, Hus B, Campus Valla, Linköpings universitet, Linköping, 10:15 (English)
Göransson, Bo, Dr.