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Pulse And Noise shaping D/A converter (PANDA) – Block implementation in 65nm SOI CMOS
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, Department of Electrical Engineering.
2009 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

In the European research projects SIAM and 100GET, building blocks for 100Gbit Ethernet optical link have been implemented. Data are sent from a computer, modulated, converted to analog, mixed onto the RF-band, sent through an optical link, down-mixed, converted back to digital, demodulated and sent to a receiving computer. Signal Processing Devices Sweden AB is contributing to this project by their implementation PANDA. This thesis has been to study, as a proof of concept, and implement a prototype of PANDA as the component converting from digital to analog signal, the DAC, in 65nm SOI CMOS technology.

The idea of the system is to use the concept of time interleaving, where two or more components interact by performing the same operations on a different set of data, ideally scaling the performance linearly with the amount of components used.

This report presents design, implementation and verification at simulation level. It includes interfacing with off-chip components in low voltage specifications, clock generation, filtering and current-steered switches.

Place, publisher, year, edition, pages
2009. , 50 p.
Keyword [en]
100GET, CMOS, DAC, interleaving, PANDA, SIAM, SOI
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:liu:diva-51632ISRN: LiTH-ISY-EX--09/4245--SEOAI: diva2:277073
Available from: 2009-11-17 Created: 2009-11-10 Last updated: 2009-11-17Bibliographically approved

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Hägglund, Joel
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Electronics SystemDepartment of Electrical Engineering
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