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Automating IEEE 1500 wrapper insertion
Linköping University, Department of Computer and Information Science.
2009 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

Integrated circuits (ICs) are becoming increasingly complex, which leadsto long design and development times. Designing ICs in a modular fashionis efficient to shorten design and development times. Due to imperfection inIC manufacturing, all ICs are tested. An IC designed in a modular fashioncan be tested in a modular manner. To enable modular test, the IEEE 1500std has been developed to enable isolation and access of modules. Whilethe IEEE 1500 std is adopted, there is yet no commercial tool available.

In this thesis we have (1) developed an IEEE 1500 std wrapper and (2)included it in a design flow based on a commercial tool, and developed scriptto automate the process. Given a module in VHDL, our design automationautomatically makes synthesis, scan insertion, test generation (ATPG), andwrapper insertion. We have applied the design flow to several benchmarksand through simulation verified the correctness.

Place, publisher, year, edition, pages
2009. , 45 p.
Keyword [en]
IEEE 1500 Standard Testability Method for Embedded Core-based Integrated Circuits, VHDL, Python, Wrapper Insertion
National Category
Computer Science
URN: urn:nbn:se:liu:diva-52347ISRN: LIU-IDA/LITH-EX-A--09/055--SEOAI: diva2:282026
2009-11-13, Donald Knuth, Linköpings Universitet, Linköping, 13:00 (English)
Available from: 2009-12-18 Created: 2009-12-16 Last updated: 2009-12-28Bibliographically approved

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