liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Evaluation of different CMOS processes using a circuit optimization tool
Linköping University, Department of Electrical Engineering, Electronics System.
2009 (English)Independent thesis Basic level (professional degree), 10 credits / 15 HE creditsStudent thesis
Abstract [en]

The geometry of CMOS processes has decreased in a steady pace over the years at the same time as the complexity has increased. Even if there are more requirements on the designer today, the main goal is still the same: to minimize the occupied area and power dissipation. This thesis investigates if a prediction of the costs in future CMOS processes can be made. By implementing several processes on a test circuit we can see a pattern in area and power dissipation when we change to smaller processes.

This is done by optimizing a two-stage operational transconductance amplifier on basis of a given specification. A circuit optimization tool evaluates the performance measures and costs. The optimization results from the area and power dissipation is used to present a diagram that shows the decreasing costs with smaller processes and also a prediction of how small the costs will be for future processes. This thesis also presents different optimization tools and a design hexagon that can be used when we struggle with optimization trade-offs.

Place, publisher, year, edition, pages
2009. , 47 p.
Keyword [en]
CMOS process, Scaling, Operational transconductance amplifier, Optimization tool
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-52338ISRN: LiTH-ISY-EX-ET--09/0365--SEOAI: oai:DiVA.org:liu-52338DiVA: diva2:285530
Presentation
2009-12-18, Nollstället, Linköpings universitet 581 33, Linköping, 10:00 (English)
Uppsok
Technology
Supervisors
Examiners
Available from: 2010-01-12 Created: 2009-12-16 Last updated: 2010-01-12Bibliographically approved

Open Access in DiVA

Evaluation of different CMOS processes using a circuit optimization tool(642 kB)677 downloads
File information
File name FULLTEXT02.pdfFile size 642 kBChecksum SHA-512
786bd07c02f3f0895fcab18282bbae44ce9440b48b9d8cbee67e8330095cf0085509de0346f9e2d2d623e0b444ac09efa12309eae38c922b6adc3136f36905a8
Type fulltextMimetype application/pdf

Search in DiVA

By author/editor
Johansson, Anders
By organisation
Electronics System
Other Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar
Total: 678 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 336 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf