Impact of voltage scaling on glitch power consumption
2000 (English)In: Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation 10th International Workshop,PATMOS 2000 Göttingen, Germany, September 13–15, 2000 Proceedings / [ed] Dimitrios Soudris, Peter Pirsch and Erich Barke, Springer Berlin/Heidelberg, 2000, Vol. 1918, 139-148 p.Chapter in book (Refereed)
To be able to predict the importance of glitches in future deep-submicron processes with lowered supply and threshold voltages, a study has been conducted on designs, which experience glitching, at supply voltages in the range from 3.5 V to 1.0 V. The results show that the dynamic power consumption caused by glitches will, in comparison to the dynamic power consumption of transitions, be at least as important in the future as it is today
Place, publisher, year, edition, pages
Springer Berlin/Heidelberg, 2000. Vol. 1918, 139-148 p.
Lecture Notes in Computer Science, ISSN 0302-9743 (print), 1611-3349 (online) ; 1918
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-53597DOI: 10.1007/3-540-45373-3_14ISBN: 3-540-41068-6ISBN: 978-3-540-41068-3ISBN: e-978-3-540-45373-4OAI: oai:DiVA.org:liu-53597DiVA: diva2:290089