Radio Architecture for Parallel Processing of Extremely High Speed Data
2009 (English)In: IEEE International Conference on Ultra-Wideband, ICUWB, Vancouver, Canada, 9-11 Sept., IEEE , 2009, 433-437 p.Conference paper (Refereed)
Using our own-developed frequency multiplexing network, a radio architecture for parallel radio signal processing has been proposed for achieving extremely high data rate above 10 Gbit/s. To meet the high requirement on phase linearity, amplitude balance and low noise figure in a very large bandwidth, our own-developed ultra-wideband six-port correlator has been utilized for the modulator and demodulator in the radio architecture.
Place, publisher, year, edition, pages
IEEE , 2009. 433-437 p.
radio architecture, parallel processing, wireless data, high speed
IdentifiersURN: urn:nbn:se:liu:diva-53606DOI: 10.1109/ICUWB.2009.5288704ISBN: 978-1-4244-2930-1OAI: oai:DiVA.org:liu-53606DiVA: diva2:290157