A sub-130-nm conditional keeper technique
2002 (English)In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, Vol. 37, no 5, 633-638 p.Article in journal (Refereed) Published
Increasing leakage currents combined with reduced noise margins significantly degrade the robustness of wide dynamic circuits. In this paper, we describe two conditional keeper topologies for improving the robustness of sub-130-nm wide dynamic circuits. They are applicable in normal mode of operation as well as during burn-in test. A large fraction of the keepers is activated conditionally, allowing the use of strong keepers with leaky precharged circuits without significant impact on performance of the circuits. Compared to conventional techniques, up to 28% higher performance has been observed for wide dynamic gates in a 130-nm technology. In addition, the proposed burn-in keeper results in 64% active area reduction
Place, publisher, year, edition, pages
2002. Vol. 37, no 5, 633-638 p.
Burn-in, conditional, dynamic circuits, keeper, leakage, robustness.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-54012DOI: 10.1109/4.997857OAI: oai:DiVA.org:liu-54012DiVA: diva2:296994