A Low-Leakage Dynamic Multi-Ported Register file in 0.13mm CMOS
2001 (English)In: ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design, New York, USA: ACM , 2001, 68-71 p.Conference paper (Refereed)
Increasing leakage currents combined with reduced noise margins are seriously degrading the robustness of dynamic circuits. This paper describes a dynamic implementation of a 256X32b 4-read/write-port Register-File for ~6GHz operation at 1.2V in a 0.13 utilize an efficient conditional keeper-technique, where a large fraction of the keeper is turned remains are able to improve upon all-low-Vt performance by 4%, while maintaining Dual-Vt usage. Thus, the robustness is improved by 96% and the active leakage power is reduced by 5X.
Place, publisher, year, edition, pages
New York, USA: ACM , 2001. 68-71 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-54099DOI: 10.1145/383082.383096ISBN: 1-58113-371-5OAI: oai:DiVA.org:liu-54099DiVA: diva2:299551
International Symposium on Low Power Electronics and Design (ISLPED 2001), 6-7 August 2001, Huntington Beach, California, USA