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Adapting an FPGA-optimized  microprocessor to the MIPS32 instruction set
Linköping University, Department of Electrical Engineering, Computer Engineering.
Linköping University, Department of Electrical Engineering, Computer Engineering.
2010 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesisAlternative title
Anpassning av en FPGA-optimerad processor till  instruktionsuppsättningen MIPS32 (Swedish)
Abstract [en]

Nowadays, FPGAs are large enough to host entire system-on-chip designs, wherein a soft core processor is often an integral part. High performance of the processor is always desirable, so there is an interest in finding faster solutions.This report aims to describe the work and results performed by Karl Bengtson and Olof Andersson at ISY. The task was to continue the development of a soft core microprocessor, originally created by Andreas Ehliar. The first step was to decide a more widely adopted instruction set for the processor. The choice fell upon the MIPS32 instruction set. The main work of the project has been focused on implementing support for MIPS32, allowing the processor to execute MIPS assembly language programs. The development has been done with speed optimization in mind. For every new function, the effects on the maximum frequency has been considered, and solutions not satisfying the speed requirements has been abandoned or revised.The performance has been measured by running a benchmark program—Coremark. Comparison has also been made to the main competitors among soft core processors. The results were positive, and reported a higher Coremark score than the other processors inthe study. The processor described herein still lacks many essential features. Nevertheless, the conclusion is that it may be possible to create a competitive alternative to established soft processors.

Abstract [sv]

FPGAer används idag ofta för stora inbyggda system, i vilka en mjuk processor ofta spelar en viktig roll. Hög prestanda hos processorn är alltid önskvärt, så det finns ett intresse i att hitta snabbare lösningar. Denna rapport skall beskriva det arbete och de resultat som uppnåtts av Karl Bengtson och Olof Andersson på ISY. Uppgiften var att fortsätta utvecklandet av en mjuk processor, som ursprungligen skapats av Andreas Ehliar. Första steget var att välja ut en mer allmänt använd instruktionsuppsättning för processorn. Valet föll på instruktionsuppsättningsarkitekturen MIPS32. Projektets huvutarbete har varit fokuserat på att implementera stöd för MIPS32, vilket ger processorn möjlighet att köra assemblerprogram för MIPS.Utvecklingen har gjorts med hastighetsoptimering i beaktning. För varje ny funktion har dess effekter på maxfrekvensen undersökts,och lösningar som inte uppfyllt hastighetskraven har förkastats eller reviderats. Prestandan har mätts med programmet Coremark. Det har också gjorts jämförelser med huvudkonkurrenterna bland mjuka processorer. Resultaten var positiva, och rapporterade ett högre Coremarkpoäng än de andra processorerna i studien. Slutsatsen är att det ärmöjligt att skapa ett alternativ till de etablerade mjuka processorerna, men att denna processor fortfarande saknar väsentliga funktioner som behövs för att utgöra en mogen produkt.

Place, publisher, year, edition, pages
2010. , 102 p.
Keyword [en]
FPGA, Xilinx, Virtex-4, MicroBlaze, soft core processor, optimized, MIPS, MIPS32, Coremark
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:liu:diva-54680ISRN: LiTH-ISY-EX--10/4323--SEOAI: oai:DiVA.org:liu-54680DiVA: diva2:327929
Presentation
2010-03-19, Glashuset, B-huset, Campus Valla, Linköping, 13:00 (English)
Uppsok
Technology
Supervisors
Examiners
Available from: 2010-07-01 Created: 2010-04-01 Last updated: 2010-07-01Bibliographically approved

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CiteExportLink to record
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