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Design and Implementation of a DMA Controller for Digital Signal Processor
Linköping University, Department of Electrical Engineering, Computer Engineering.
2010 (English)Independent thesis Advanced level (degree of Master (Two Years)), 30 credits / 45 HE creditsStudent thesis
Abstract [en]

The thesis work is conducted in the division of computer engineering at thedepartment of electrical engineering in Linköping University. During the thesiswork, a configurable Direct Memory Access (DMA) controller was designed andimplemented. The DMA controller runs at 200MHz under 65nm digital CMOS technology. The estimated gate count is 26595.

The DMA controller has two address generators and can provide two clocksources. It can thus handle data read and write simultaneously. There are 16channels built in the DMA controller, the data width can be 16-bit, 32-bit and64-bit. The DMA controller supports 2D data access by configuring its intelligentlinking table. The DMA is designed for advanced DSP applications and it is notdedicated for cache which has a fixed priority.

Place, publisher, year, edition, pages
2010. , 67 p.
Keyword [en]
DMA, direct memory access, digital signal processing, DSP, linking table, processor, peripherals, scalability
National Category
Computer Engineering
URN: urn:nbn:se:liu:diva-58868ISRN: LiTH-ISY-EX--10/4244--SEOAI: diva2:346261
2010-08-27, Glashuset, Linköpings universitet 581 83 LINKÖPING, Linköping, 13:00 (English)
Available from: 2010-09-15 Created: 2010-08-31 Last updated: 2010-09-15Bibliographically approved

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