liu.seSearch for publications in DiVA
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Reduction of Substrate Noise in Sub Clock Frequency Range
Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
Zoran Sweden.
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
2010 (English)In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, ISSN 1549-8328, Vol. 57, no 6, 1287-1297 p.Article in journal (Refereed) Published
Abstract [en]

We propose a method of reducing the switching noise in the substrate of an integrated circuit. The main idea is to design the digital circuits to obtain a periodic supply current with the same period as the clock. This property locates the frequency components of the switching noise above the clock frequency. Differential return-to-zero signaling is used to reduce the data-dependency of the current. Circuits are implemented in symmetrical precharged DCVS logic with internally asynchronous D registers. A chip was fabricated in a standard 130-nm CMOS technology holding two versions of a pipelined 16-bit adder. First version employed the proposed method, and second version used conventional static CMOS logic circuits and TSPC registers. The respective device counts are 1190 and 684, and maximal operating frequencies 450 and 375 MHz. Frequency domain measurements were performed at the substrate node with on-chip generated sinusoidal and pseudo-random data at a clock frequency of 300 MHz. The sinusoidal case resulted in the largest frequency components, where an 8.5 dB/Hz decrease in maximal power is measured for the proposed circuitry at a cost of three times larger power consumption.

Place, publisher, year, edition, pages
IEEE , 2010. Vol. 57, no 6, 1287-1297 p.
Keyword [en]
Flip-flops, integrated circuit noise, mixed analogdigital integrated circuits, simultaneous switching noise, substrate noise
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-60247DOI: 10.1109/TCSI.2009.2031749ISI: 000281783800017OAI: oai:DiVA.org:liu-60247DiVA: diva2:355843
Note
©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. Syed Muhammad Yasser Sherazi, Shahzad Asif, Erik Backenius and Mark Vesterbacka, Reduction of Substrate Noise in Sub Clock Frequency Range, 2010, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, (57), 6, 1287-1297. http://dx.doi.org/10.1109/TCSI.2009.2031749 Available from: 2010-10-08 Created: 2010-10-08 Last updated: 2010-10-15

Open Access in DiVA

fulltext(2965 kB)1335 downloads
File information
File name FULLTEXT01.pdfFile size 2965 kBChecksum SHA-512
c4332a06845f2221b34bc5dcb471a5471edeb3793a433c51ff793d94459e55dff9d99f933117f009f60354354a6640c0ffe52c8bf39e8500927ad4f734ccf32a
Type fulltextMimetype application/pdf

Other links

Publisher's full text

Authority records BETA

Vesterbacka, Mark

Search in DiVA

By author/editor
Vesterbacka, Mark
By organisation
Department of Electrical EngineeringThe Institute of TechnologyElectronics System
Engineering and Technology

Search outside of DiVA

GoogleGoogle Scholar
Total: 1335 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

doi
urn-nbn

Altmetric score

doi
urn-nbn
Total: 130 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf