Si-LDMOS transistor is studied by TCAD simulation for improved RF performance. In LDMOS structure, a low-doped reduced surface field (RESURF) region is used to obtain high breakdown voltage, but it reduces the transistor RF performance due to high on-resistance. The interface charges between oxide and the RESURF region are studied and found to have a strong impact on the transistor performance both in DC and RF. The presence of excess interface state charges at the RESURF region results not only higher DC drain current but also improved RF performance in terms of power, gain and efficiency. The most important achievement is the enhancement of operating frequency and RF output power is obtained well above 1 W/mm up to 4 GHz.

Inan LDMOS transistor, a low doped drift (LDD) region atthe drain side is created to enhance the breakdown voltage(BVDS), but this increases on-resistance (Ron) which degrades the transistorRF performance. In this paper, the LDD region of LDMOStransistor is optimized using two different techniques, (i) a dualimplanted-layer p- and n-region in LDD and (ii) an excessinterface charge at the RESURF of LDD. Both techniques areused to enhance the carrier density for lower Ron. Thecomparison revealed that excess interface charge provides 43 % reductionin Ron with BVDS of 70 V, while the dual-implantedregion provides 26 % reduction in Ron together with BVDSof 64 - 68 V.

Matchingnetwork is major issue in broadband power amplifiers due tothe fact that the transistor impedances are varying both withfrequency and signal level. Thus it is difficult to matchthese impedances both at the input and output stages. Thetunable matching networks are very demanding and desired for buildingflexible systems, but their accuracy depends on the transistor performanceunder the large signal operation. Computational load pull (CLP) simulationtechnique is a unique way to extract the impedances ofpower transistor at desired frequencies which make the design ofmatching network much easier for multiple bands power amplifiers. AnLDMOS transistor is studied and its optimum impedances are extractedat 1, 2 and 2.5 GHz. Through optimum impedance, thetunable matching networks can be easily design for broadband amplifiers.

A simulation technique is developed in TCAD to study the non-linear behavior of RF power transistor. The technique is based on semiconductor transport equations to swot up the overall non-linearity’s occurring in RF power transistor. Computational load-pull simulation technique (CLP) developed in our group, is further extended to study the non-linear effects inside the transistor structure by conventional two-tone RF signals, and initial simulations were done in time domain. The technique is helpful to detect, understand the phenomena and its mechanism which can be resolved and improve the transistor performance. By this technique, the third order intermodulation distortion (IMD₃) was observed at different power levels. The technique was successfully implemented on a laterally-diffused field effect transistor (LDMOS). The value of IMD₃ obtained is −22 dBc at 1-dB compression point (P _{1 dB}) while at 10 dB back off the value increases to −36 dBc. Simulation results were experimentally verified by fabricating a power amplifier with the similar LDMOS transistor.

This paper presents a TCAD study of high speed switching behavior of RF power-transistor in class-F Power Amplifier. We utilized finite harmonics loads for achieving maximum efficiency, without external circuitry. The in house developed computational load–pull (CLP) simulation technique is further extended to investigate the odd harmonic effects of RF transistor in class-F operation. An LD-MOSFET is studied which provided 81.2 % power added efficiency (PAE) at 1 GHz. The concept is experimentally verified by fabricating a class-F PA using same transistor. In the measurement, 76 % PAE is achieved, which is close to the TCAD simulated results. TCAD is an excellent tool to study the behavior of active devices. It has an ability to enhance and optimize the performance of transistor according to system specifications before fabrication.

Technology Computer Aided Design (TCAD) provides an alternate method to study the power amplifier (PA) design prior to fabrication. It is very useful for the extraction of an accurate large signal model. This paper presents a design approach from device to circuit level to study broadband PA performance of RF-LDMOS using computational load-pull (CLP) analysis. To validate the TCAD approach, we have designed a broadband (1.9 - 2.5 GHz) class AB power amplifier. The concept is verified by designing an output broadband matching network at optimum impedance value (Zf) of RF-LDMOS using ADS software. The large signal results verify this concept and RF output power of 30.8 dBm is achieved with comparable gain and efficiency.