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Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems
Linköping University, Department of Physics, Chemistry and Biology, Semiconductor Materials. Linköping University, The Institute of Technology.
2010 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The emergence of new communication standards has put a key challenge for semiconductor industry to develop RF devices that can handle high power and high data rates simultaneously. The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a heart of base-station. From economical point of view, a single wideband RF power module is more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode operation. Therefore, device modeling has now become much more crucial for such applications. In order to reduce the device design cycle time, the researchers also heavily rely on computer aided design (CAD) tools. With improvement in CAD technology the model extraction has become more accurate and device physical structure optimization can be carried out with less number of iterations.

LDMOS devices have been dominating in the communication field since last decade and are still widely used for PA design and development. This thesis deals with the optimization of RFLDMOS transistor and its evaluation in different PA classes, such as linear, switching, wideband and multi-band applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are also developed in technology CAD (TCAD) using large signal time domain computational load-pull (CLP) methods.

Initially the RF-LDMOS is studied in TCAD for the improved RF performance. The physical intrinsic structure of RF-LDMOS is provided by Infenion Technologies AG. A reduced surface field (RESURF) of low-doped drain (LDD) region is considered in detail because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage (BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance (Ron). The excess interface state charges at the RESURF region are introduced to reduce the Ron, which not only increases the dc drain current, but also improve the RF performance in terms of power, gain and efficiency. The important achievement is the enhancement in operating frequency up to 4 GHz. In LDD region, the effect of excess interface charges at the RESURF is also compared with dual implanted-layer of p-type and n-type. The comparison revealed that the former provides 43 % reduction in Ron with BVDS of 70 V, while the later provides 26 % reduction in Ron together with BVDS of 64 - 68 V.

In the second part of my research work, computational load pull (CLP) simulation technique is used in TCAD to extract the impedances of RF-LDMOS at different frequencies under large signal operation. Flexible matching is an issue in the design of broadband or multi-band PAs. Optimum impedance of RF-LDMOS is extracted at operating frequencies of 1, 2 and 2.5 GHz in class AB PA. After this, CLP simulation technique is further developed in TCAD to study the non-linear behavior of RF devices. Through modified CLP technique, non-linear effects inside the transistor structure are studied by conventional two-tone RF signals in time domain. This is helpful to detect and understand the phenomena, which can be resolved to improve the device performance. The third order inter-modulation distortion (IMD3) of RF- LDMOS was observed at different power levels. The IMD3 of −22 dBc is obtained at 1-dB compression point (P1-dB), while at 10 dB back off the value increases to −36 dBc. These results were also verified experimentally by fabricating a linear PA. Similarly, CLP technique is developed further for the analysis of RF devices in high efficiency operation by investigating the odd harmonic effects for the design of class-F PA. RF-LDMOS can provide a power added efficiency (PAE) of 81.2 % in class-F PA at 1 GHz in TCAD simulations. The results are verified by design and fabrication of class-F PA using large signal model of the similar device in ADS. In fabrication, a PAE of 76 % is achieved.

Place, publisher, year, edition, pages
Linköping: Linköping University Electronic Press , 2010. , 64 p.
Series
Linköping Studies in Science and Technology. Dissertations, ISSN 0345-7524 ; 1346
Keyword [en]
RF-LDMOS, power amplifiers, technology CAD, load-pull, non-linear analysis, and switching analysis
National Category
Condensed Matter Physics
Identifiers
URN: urn:nbn:se:liu:diva-61599ISBN: 978-91-7393-294-3 (print)OAI: oai:DiVA.org:liu-61599DiVA: diva2:370565
Public defence
2010-12-03, Plank, Fysikhuset, Campus Valla, Linköpings universitet, Linköping, 10:15
Opponent
Supervisors
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2010-11-17Bibliographically approved
List of papers
1. Influence of interface state charges on RF performance of LDMOS transistor
Open this publication in new window or tab >>Influence of interface state charges on RF performance of LDMOS transistor
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2008 (English)In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 52, no 7, 1099-1105 p.Article in journal (Refereed) Published
Abstract [en]

Si-LDMOS transistor is studied by TCAD simulation for improved RF performance. In LDMOS structure, a low-doped reduced surface field (RESURF) region is used to obtain high breakdown voltage, but it reduces the transistor RF performance due to high on-resistance. The interface charges between oxide and the RESURF region are studied and found to have a strong impact on the transistor performance both in DC and RF. The presence of excess interface state charges at the RESURF region results not only higher DC drain current but also improved RF performance in terms of power, gain and efficiency. The most important achievement is the enhancement of operating frequency and RF output power is obtained well above 1 W/mm up to 4 GHz.

Place, publisher, year, edition, pages
Elsevier, 2008
Keyword
Semiconductor devices; Interface state charges; Power electronics; Amplifiers; CAD simulations
National Category
Natural Sciences
Identifiers
urn:nbn:se:liu:diva-20866 (URN)10.1016/j.sse.2008.04.001 (DOI)
Available from: 2009-09-24 Created: 2009-09-24 Last updated: 2017-12-13Bibliographically approved
2. Reduction in on-resistance of LDMOS transistor for improved RF performance
Open this publication in new window or tab >>Reduction in on-resistance of LDMOS transistor for improved RF performance
2009 (English)In: Microelectronics Technology and Devices - SBMicro 2009, Vol. 23, issue 1 / [ed] D. De Lima Monteiro, O. Bonnaud, N. Morimoto, Pennington, New Jersey: The Electrochemical Society , 2009, 413-420 p.Conference paper, Published paper (Refereed)
Abstract [en]

Inan LDMOS transistor, a low doped drift (LDD) region atthe drain side is created to enhance the breakdown voltage(BVDS), but this increases on-resistance (Ron) which degrades the transistorRF performance. In this paper, the LDD region of LDMOStransistor is optimized using two different techniques, (i) a dualimplanted-layer p- and n-region in LDD and (ii) an excessinterface charge at the RESURF of LDD. Both techniques areused to enhance the carrier density for lower Ron. Thecomparison revealed that excess interface charge provides 43 % reductionin Ron with BVDS of 70 V, while the dual-implantedregion provides 26 % reduction in Ron together with BVDSof 64 - 68 V.

Place, publisher, year, edition, pages
Pennington, New Jersey: The Electrochemical Society, 2009
Series
ECS Transaction, ISSN 1938-5862, E-ISSN 1938-6737
National Category
Natural Sciences
Identifiers
urn:nbn:se:liu:diva-61592 (URN)10.1149/1.3183746 (DOI)978-1-56677-737-7 (ISBN)
Conference
24th Symposium on Microelectronics Technology and Devices, Natal, Brazil
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2017-02-28Bibliographically approved
3. Flexible power amplifier designing form device to circuit level by computational load-pull simulation technique
Open this publication in new window or tab >>Flexible power amplifier designing form device to circuit level by computational load-pull simulation technique
2008 (English)In: Microelectonics Technology and Devices - SBMicro 2008, Vol. 14, issue 1: J. Swart, S. Selberherr, A. Susin, J. Diniz, N. Morimoto, Pennington, New Jersey: Electrochemical Society , 2008, Vol. 14, 233-239 p.Conference paper, Published paper (Refereed)
Abstract [en]

Matchingnetwork is major issue in broadband power amplifiers due tothe fact that the transistor impedances are varying both withfrequency and signal level. Thus it is difficult to matchthese impedances both at the input and output stages. Thetunable matching networks are very demanding and desired for buildingflexible systems, but their accuracy depends on the transistor performanceunder the large signal operation. Computational load pull (CLP) simulationtechnique is a unique way to extract the impedances ofpower transistor at desired frequencies which make the design ofmatching network much easier for multiple bands power amplifiers. AnLDMOS transistor is studied and its optimum impedances are extractedat 1, 2 and 2.5 GHz. Through optimum impedance, thetunable matching networks can be easily design for broadband amplifiers.

Place, publisher, year, edition, pages
Pennington, New Jersey: Electrochemical Society, 2008
Series
ECS Transations, ISSN 1938-5862, E-ISSN 1938-6737
National Category
Natural Sciences
Identifiers
urn:nbn:se:liu:diva-43513 (URN)10.1149/1.2956037 (DOI)74034 (Local ID)978-1-56677-646-2 (ISBN)74034 (Archive number)74034 (OAI)
Conference
23rd Symposium on Microelectronics Technology and Devices, September 1 to 4, Gramado, Brazil
Available from: 2009-10-10 Created: 2009-10-10 Last updated: 2017-04-11Bibliographically approved
4. A TCAD approach for non-linear evaluation of microwave power transistor and its experimental verification by LDMOS
Open this publication in new window or tab >>A TCAD approach for non-linear evaluation of microwave power transistor and its experimental verification by LDMOS
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2010 (English)In: Journal of Computational Electronics, ISSN 1569-8025, E-ISSN 1572-8137, Vol. 9, no 2, 79-86 p.Article in journal (Refereed) Published
Abstract [en]

A simulation technique is developed in TCAD to study the non-linear behavior of RF power transistor. The technique is based on semiconductor transport equations to swot up the overall non-linearity’s occurring in RF power transistor. Computational load-pull simulation technique (CLP) developed in our group, is further extended to study the non-linear effects inside the transistor structure by conventional two-tone RF signals, and initial simulations were done in time domain. The technique is helpful to detect, understand the phenomena and its mechanism which can be resolved and improve the transistor performance. By this technique, the third order intermodulation distortion (IMD3) was observed at different power levels. The technique was successfully implemented on a laterally-diffused field effect transistor (LDMOS). The value of IMD3 obtained is −22 dBc at 1-dB compression point (P 1 dB) while at 10 dB back off the value increases to −36 dBc. Simulation results were experimentally verified by fabricating a power amplifier with the similar LDMOS transistor.

Place, publisher, year, edition, pages
SpringerLink, 2010
Keyword
Power amplifier, Non-linear analysis, Technology CAD, RF transistor, Time-domain analysis
National Category
Engineering and Technology
Identifiers
urn:nbn:se:liu:diva-61593 (URN)10.1007/s10825-010-0307-x (DOI)
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2017-12-12Bibliographically approved
5. Switching Behavior of Microwave Power Transistor Studied in TCAD for Switching Class Power Amplifiers and Experimental Verification by LDMOS based Class-F Power Amplifier
Open this publication in new window or tab >>Switching Behavior of Microwave Power Transistor Studied in TCAD for Switching Class Power Amplifiers and Experimental Verification by LDMOS based Class-F Power Amplifier
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2010 (English)Manuscript (preprint) (Other academic)
Abstract [en]

This paper presents a TCAD study of high speed switching behavior of RF power-transistor in class-F Power Amplifier. We utilized finite harmonics loads for achieving maximum efficiency, without external circuitry. The in house developed computational load–pull (CLP) simulation technique is further extended to investigate the odd harmonic effects of RF transistor in class-F operation. An LD-MOSFET is studied which provided 81.2 % power added efficiency (PAE) at 1 GHz. The concept is experimentally verified by fabricating a class-F PA using same transistor. In the measurement, 76 % PAE is achieved, which is close to the TCAD simulated results. TCAD is an excellent tool to study the behavior of active devices. It has an ability to enhance and optimize the performance of transistor according to system specifications before fabrication.

Keyword
Power amplifiers, class- F, switching response, LDMOS transistor, TCAD, time domain simulations
National Category
Natural Sciences
Identifiers
urn:nbn:se:liu:diva-61597 (URN)
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2010-11-17
6. A TCAD Approach to Design a Broadband Power Amplifier
Open this publication in new window or tab >>A TCAD Approach to Design a Broadband Power Amplifier
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2010 (English)Manuscript (preprint) (Other academic)
Abstract [en]

Technology Computer Aided Design (TCAD) provides an alternate method to study the power amplifier (PA) design prior to fabrication. It is very useful for the extraction of an accurate large signal model. This paper presents a design approach from device to circuit level to study broadband PA performance of RF-LDMOS using computational load-pull (CLP) analysis. To validate the TCAD approach, we have designed a broadband (1.9 - 2.5 GHz) class AB power amplifier. The concept is verified by designing an output broadband matching network at optimum impedance value (Zf) of RF-LDMOS using ADS software. The large signal results verify this concept and RF output power of 30.8 dBm is achieved with comparable gain and efficiency.

Keyword
Power amplifier, load-pull, time domain analysis, broadband, LC network, Si-LDMOS
National Category
Natural Sciences
Identifiers
urn:nbn:se:liu:diva-61598 (URN)
Available from: 2010-11-17 Created: 2010-11-17 Last updated: 2010-11-17

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Kashif, Ahsan-Ullah

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