Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation
2011 (English)In: Digital System Design (DSD), 2011 14th Euromicro Conference on, 2011, 197-204 p.Conference paper (Refereed)
High temperature and process variation areundesirable effects for modern systems-on-chip. The hightemperature is a prominent issue during test and should be takencare of during the test process. Modern SoCs, affected by largeprocess variation, experience rapid and large temperaturedeviations and, therefore, a traditional static test schedule which isunaware of these deviations will be suboptimal in terms of speedand/or thermal-safety. This paper presents an adaptive testscheduling method which addresses the temperature deviationsand acts accordingly in order to improve the test speed andthermal-safety. The proposed method is divided into acomputationally intense offline-phase, and a very simple online-phase.In the offline-phase a schedule tree is constructed, and inthe online-phase the appropriate path in the schedule tree istraversed, step by step and based on temperature sensor readings.Experiments have demonstrated the efficiency of the proposedmethod.
Place, publisher, year, edition, pages
2011. 197-204 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-69728DOI: 10.1109/DSD.2011.29ISBN: 978-1-4577-1048-3OAI: oai:DiVA.org:liu-69728DiVA: diva2:432218
14th Euromicro Conference on Digital System Design (DSD11), Oulu, Finland, August 31 – September 2, 2011.