Test Scheduling in an IEEE P1687 Environment with Resource and Power Constraints
2011 (English)In: Proceedings of the Asian Test Symposium, IEEE , 2011, 525-531 p.Conference paper (Refereed)
In contrast to IEEE 1149.1, IEEE P1687 allows, through segment insertion bits, flexible scan paths for accessing on-chip instruments, such as test, debug, monitoring, measurement and configuration features. Flexible access to embedded instruments allows test time reduction, which is important at production test. However, the test access scheme should be carefully selected such that resource constraints are not violated and power constraints are met. For IEEE P1687, we detail in this paper session-based and session-less test scheduling, and propose resource and power-aware test scheduling algorithms for the detailed scheduling types. Results using the implementation of our algorithms shows on ITC’02-based benchmarks significant test time reductions when compared to non-optimized test schedules.
Place, publisher, year, edition, pages
IEEE , 2011. 525-531 p.
, Proceedings of the Asian Test Symposium, ISSN 1081-7735
Engineering and Technology Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-70033DOI: 10.1109/ATS.2011.80ISBN: 978-1-4577-1984-4OAI: oai:DiVA.org:liu-70033DiVA: diva2:434604
20th Asian Test Symposium, ATS 2011; New Delhi; India