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Adaptive Execution Assistance for Multiplexed Fault-Tolerant Chip Multiprocessors
(Indian Institute of Science, Bangalore, India)
(Indian Institute of Science, Bangalore, India)
(University of Wisconsin-Madison, Madison, WI, USA)
Linköping University, Department of Computer and Information Science, ESLAB - Embedded Systems Laboratory.
2011 (English)In: Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2011, 419-426 p.Conference paper, Published paper (Refereed)
Abstract [en]

Relentless scaling of CMOS fabrication technology has made contemporary integrated circuits increasingly susceptible to transient faults, wearout-related permanent faults, intermittent faults and process variations. Therefore, mechanisms to mitigate the effects of decreased reliability are expected to become essential components of future general-purpose microprocessors. In this paper, we introduce a new throughput-efficient architecture for multiplexed fault-tolerant chip multiprocessors (CMPs). Our proposal relies on the new technique of adaptive execution assistance, which dynamically varies instruction outcomes forwarded from the leading core to the trailing core based on measures of trailing core performance. We identify policies and design low overhead hardware mechanisms to achieve this. Our work also introduces a new priority-based thread-scheduling algorithm for multiplexed architectures that improves multiplexed fault tolerant CMP throughput by prioritizing stalled threads. Through simulation-based evaluation, we And that our proposal delivers 17.2% higher throughput than perfect dual modular redundant (DMR) execution and outperforms previous proposals for throughput-efficient CMP architectures.

Place, publisher, year, edition, pages
2011. 419-426 p.
National Category
Engineering and Technology Engineering and Technology
Identifiers
URN: urn:nbn:se:liu:diva-70036DOI: 10.1109/ICCD.2011.6081432ISBN: 978-1-4577-1953-0 (print)OAI: oai:DiVA.org:liu-70036DiVA: diva2:434608
Conference
29th IEEE International Conference on Computer Design 2011, ICCD 2011; Amherst, MA; United States
Available from: 2011-08-15 Created: 2011-08-15 Last updated: 2014-10-08

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Citation style
  • apa
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  • modern-language-association-8th-edition
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  • Other style
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  • de-DE
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  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
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  • asciidoc
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