Acceleration and Integration of Sound Decoding in FPGA
Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesisAlternative title
Accelerering och integrering av ljudavkodning i FPGA (Swedish)
The task has been to develop a network media renderer on an embedded linux system running on a Spartan 6 FPGA. One of the challenges have been to make the best use of the limited FPGA area. MP3 have been the prioritised format. To achieve fast MP3 decoding a MicroBlaze soft processor have been configured for speed with concern to the small area availabe. Also the software MP3 decoding process have been accelerated with hardware. MP3 files with full quality (320 kbit/s) can be decoded with real time requirements. A sound interface hardware have been designed to handle the decoded sound samples and convert them to the S/PDIF standard interface. Also UPnP commands have been implemented with the MP3 player software to complete the renderer’s network functionality.
Place, publisher, year, edition, pages
2011. , 55 p.
Hardware acceleration, digital signal processing, embedded systems, sound encoding
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-70180ISRN: LiTH-ISY-EX--11/4471--SEOAI: oai:DiVA.org:liu-70180DiVA: diva2:436493
Subject / course