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Strömsnål FM-demodulering med FPGA
Linköping University, Department of Electrical Engineering, Electronics System.
2011 (Swedish)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesisAlternative title
Low power FM demodulation using an FPGA (English)
Abstract [sv]

Rutiner skrivna i Verilog har utvecklats för avkodning av en frekvensmodulerad signal givet ett Analog Devices AD9874-chip. Olika metoder för I/Q-demodulation har utvärderats och av dessa har CORDIC valts och implementerats i Verilog.

Koden har till viss del testats på en IGLOO nano-FPGA men framförallt simulerats och verifierats i ModelSim.

Abstract [en]

Routines written in Verilog have been developed to perform I/Q-demodulation of a frequency modulated signal given valuesfrom a Analog Devices AD9874 chip. Different methods for I/Q-demodulation have been evaluated and among theseCORDIC has been chosen and implemented in Verilog.

The code has to some extent been tested on a IGLOO nano FPGA but foremost been simulated and verified in ModelSim.

Place, publisher, year, edition, pages
2011. , 23 p.
Keyword [en]
FM, FPGA, DARC, GMSK, CORDIC
National Category
Computer Science
Identifiers
URN: urn:nbn:se:liu:diva-70263ISRN: LITH-ISY-EX-ET--11/0369--SEOAI: oai:DiVA.org:liu-70263DiVA: diva2:437524
Subject / course
Computer science (10-credit final thesis, C level)
Uppsok
Technology
Supervisors
Examiners
Available from: 2011-09-01 Created: 2011-08-29 Last updated: 2011-09-01Bibliographically approved

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CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • oxford
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf