Design and Analysis of an Oversampling D/A Converter in DMT-ADSL Systems
2002 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 32, no 3, 201-210 p.Article in journal (Refereed) Published
Oversampling sigma-delta digital-to-analog converters are crucial building blocks for telecommunicationapplications. To reduce power consumption, lower oversampling ratios are preferred thus high-order digital sigmadeltamodulators are needed to meet the dynamic performance requirements. This paper presents an oversamplingDAC with 1.104 MHz signal bandwidth for DMT-ADSL application and focuses on the design issues of the highorderone-bit multiple feedback modulators (such as the stability problem, good inband SNDR performance, limitcycles, etc.). A new approach to obtain and optimize the stable feedback coefficients has been presented. Fromour analysis results it is found that the extra feedback coefficients and scaling coefficients in the modulator havenon-negligible impact on the behavior of the limit cycles, and design guide for selecting the scaling coefficients isprovided. Finally a 5th-order modulator with an oversampling ratio of 32 and 14-bit input has been implemented ina 0.6 μm 3.3 V CMOS process and integrated into the whole DAC chip.
Place, publisher, year, edition, pages
Dordrecht, the Netherlands: Kluwer Academic Publishers (Springer) , 2002. Vol. 32, no 3, 201-210 p.
high-order modulators, root locus analysis, NTF zeros optimization, limit cycles, sigma-delta DACs
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-70643DOI: 10.1023/A:1020335323037OAI: oai:DiVA.org:liu-70643DiVA: diva2:440962