A nonlinearity error calibration technique for pipelined ADCs
2011 (English)In: Integration, ISSN 0167-9260, Vol. 44, no 3, 229-241 p.Article in journal (Refereed) Published
This paper presents a digital background calibration technique that measures and cancels offset, linear and nonlinear errors in each stage of a pipelined analog to digital converter (ADC) using a single algorithm. A simple two-step subranging ADC architecture is used as an extra ADC in order to extract the data points of the stage-under-calibration and perform correction process without imposing any changes on the main ADC architecture which is the main trend of the current work. Contrary to the conventional calibration methods that use high resolution reference ADCs, averaging and chopping concepts are used in this work to allow the resolution of the extra ADC to be lower than that of the main ADC.
Place, publisher, year, edition, pages
Amsterdam, The Netherlands: Elsevier, 2011. Vol. 44, no 3, 229-241 p.
Background calibration, Chopping technique, Extra ADC, Harmonic distortion, Pipelined ADC
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-70615DOI: 10.1016/j.vlsi.2011.01.004ISI: 000292011900008OAI: oai:DiVA.org:liu-70615DiVA: diva2:440993