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A nonlinearity error calibration technique for pipelined ADCs
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran.
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran.
Linköping University, Department of Electrical Engineering, Electronics System. Linköping University, The Institute of Technology.
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran.
2011 (English)In: Integration, ISSN 0167-9260, E-ISSN 1872-7522, Vol. 44, no 3, 229-241 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents a digital background calibration technique that measures and cancels offset, linear and nonlinear errors in each stage of a pipelined analog to digital converter (ADC) using a single algorithm. A simple two-step subranging ADC architecture is used as an extra ADC in order to extract the data points of the stage-under-calibration and perform correction process without imposing any changes on the main ADC architecture which is the main trend of the current work. Contrary to the conventional calibration methods that use high resolution reference ADCs, averaging and chopping concepts are used in this work to allow the resolution of the extra ADC to be lower than that of the main ADC.

Place, publisher, year, edition, pages
Amsterdam, The Netherlands: Elsevier, 2011. Vol. 44, no 3, 229-241 p.
Keyword [en]
Background calibration, Chopping technique, Extra ADC, Harmonic distortion, Pipelined ADC
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-70615DOI: 10.1016/j.vlsi.2011.01.004ISI: 000292011900008OAI: oai:DiVA.org:liu-70615DiVA: diva2:440993
Available from: 2011-09-14 Created: 2011-09-14 Last updated: 2017-12-08Bibliographically approved

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Wikner, Jacob

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