Modeling and Digital Predistortion of Class-D Outphasing RF Power Amplifiers
2011 (English)Manuscript (preprint) (Other academic)
This paper presents a direct model structure for describing class-D outphasing amplifiers and a method for digitally predistorting these amplifiers. The direct model structure is based on modeling differences in gain and delay, nonlinear interactions between the two paths and differences in the amplifier behavior. The digital predistortion method is designed to operate only on the input signals’ phases, to correct for both amplitude and phase mismatches. This eliminates the need for additional voltage supplies to compensate for gain mismatch.
Model and predistortion performance are evaluated on a 32 dBm peak output power, class-D outphasing amplifier in CMOS with on-chip transformers. The excitation signal is a 5 MHz wide downlinkWCDMA signal with peak-to-average power ratio (PAPR) of 9.5 dB. Using the proposed digital predistorter the 5 MHz adjacent channel leakage power ratio (ACLR) was improved by 13.5 dB, from -32.1 dBc to -45.6 dBc. The 10 MHz ACLR was improved by 6.4 dB, from -44.3 dBc to -50.7 dBc, making the amplifier pass the ACLR requirements.
Place, publisher, year, edition, pages
Power amplifiers, behavioral modeling, digital predistortion, outphasing amplifier, LINC
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-71860OAI: oai:DiVA.org:liu-71860DiVA: diva2:454670