Unified architecture for 2, 3, 4, 5, and 7-point DFTs based on Winograd Fourier transform algorithm
2013 (English)In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 49, no 5, 348-U60 p.Article in journal (Refereed) Published
A unified hardware architecture that can be reconfigured to calculate 2, 3, 4, 5, or 7-point DFTs is presented. The architecture is based on the Winograd Fourier transform algorithm and the complexity is equal to a 7-point DFT in terms of adders/subtractors and multipliers plus only seven multiplexers introduced to enable reconfigurability. The processing element finds potential use in memory-based FFTs, where non-power-of-two sizes are required such as in DMB-T.
Place, publisher, year, edition, pages
2013. Vol. 49, no 5, 348-U60 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-74760DOI: 10.1049/el.2012.0577ISI: 000318546200025OAI: oai:DiVA.org:liu-74760DiVA: diva2:492039